fpga - Any example useage of a BSCANE2 primitive in Xilinx 7 series? (using the JTAG port to configure user design) -
i've looked on info on bscane2 in http://www.xilinx.com/support/documentation/user_guides/ug470_7series_config.pdf (pg 169 7 series fpga configuration guide) , can't quite figure out how use based on descriptions.
i want able use jtag port on kc705 board shift in configuration data our design. think (based on description there in user guide linked above) bscane2 need that... don't understand why of pins of bscane2 component seem have wrong direction (tdo input while of other jtag control sigs tck, reset, tdi outputs). had thought there implicit connection signals of jtag port of fpga instantiated bscane2 component, doesn't appear case based on port directions. suspect i'm missing information somewhere , while have read docs it's still not clear me how use bscane2 i'm trying do.
any example usage of bscane2 component appreciated.
note: description of bscane2 in user guide linked above says:
the bscane2 primitive allows access between internal fpga logic , jtag boundary scan logic controller. allows communication between internal running design , dedicated jtag pins of fpga
this sounds need.
xilinx offers 8 bit cpu called picoblaze uses jtagloader module reconfigure picoblaze's instruction rom @ runtime. jtagloader provided in vhdl spartans , series-7 devices.
but think jtag not protocol data transfer. jtag software api mess.
what uart? boards have usb-uart bridge cp2103 supports 1 mboud.
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